The ISE Design Suite 12 software unlocks greater design productivity with breakthrough technologies f power optimization and easier IP integration. The Design Suite enables the fastest time to design completion with Xilinx Targeted Design Platfms available in four different configurations aligned to user preferred methodology-logic, embedded, DSP, system design.
Available starting with the ISE Design Suite 12 release:
Intelligent clock-gating technology that reduces dynamic power consumption by as much as 30 percent
Single standard interface with AMBA AXI4 IP f plug-and-play design
Intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost f a broad range of high perfmance applications
Complete Methodology f Targeted Design Platfms
Xilinx Targeted Design Platfms provide embedded, DSP, and hardware designers alike with access to a wide array of silicon devices suppted by open standards, common design flows, IP , and run-time platfms. The ISE Design Suite brings it all together with domain-specific design environments, while enabling design teams to meet their power and perfmance goals with Xilinx CPL Ds and FPGA s, including the new Virtex-6 and Spartan-6 families.
Integrating System-Level Design
ISE Design Suite provides a tight connection between embedded and DSP flows to enable integration of designs that contain embedded, DSP, IP , and user blocks in one system. To better serve users familiar with differing design environments, the ISE Design Suite 12 provides specific accommodations f designers ranging from the pushbutton user to the ASIC designer.
